Noise Model
Highlights of Recent Research A Crucial Testbed for Improving the Accuracy of Quantum Computing: the IQM 20-Qubit Chip
A 20-qubit superconducting device created by IQM Quantum Computers has become an essential platform for verifying a new and extremely precise noise model, which is a major advancement for the rapidly developing field of quantum computing. This study, which was conducted by IQM Quantum Computers, Ludwig-Maximilians-Universität München, and a collaborative team consisting of T. Piskor, M. Schöndorf, and M. Bauer from science + computing AG / Eviden, represents a significant advancement in addressing the widespread problems caused by noise in the current noisy intermediate-scale quantum (NISQ) era.
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The new model, which has been rigorously benchmarked on the IQM chip, promises to open the door to more dependable quantum computation and improved algorithm optimization by faithfully capturing the intricate behavior of genuine quantum hardware.
The Need for Noise Modeling in the Age of NISQ From optimization to quantum simulation, quantum computing has enormous promise for resolving issues that are now beyond the capabilities of classical machines. However, all modern quantum computers are NISQ devices, which limits the number of error-prone operations before the system’s quantum qualities deteriorate owing to hardware noise. Thus, understanding, decreasing, and suppressing noise is essential for quantum computer development. To tackle this, precise noise models that accurately depict quantum devices are essential for understanding the origins of noise as well as determining if a certain quantum algorithm can function well on a given piece of hardware.
IQMs 20-Qubit Chip: A Basis for Verification The main hardware platform for verifying this novel noise model was the IQM 20-qubit superconducting chip. Superconducting Transmon qubits with a square grid topology provide the foundation of this device. Tunable couplers positioned between each connected qubit are a crucial component of its architecture, as they help to implement the CZ gate, the chip’s native entangling gate, and minimize crosstalk. The chip makes use of the PRX gate for single-qubit operations, allowing for unrestricted rotations on the Bloch sphere around the X-Y plane. For the IQM quantum computing hardware, the PRX and CZ gates combine to produce a full gate set.
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It is crucial to comprehend how these superconducting qubit work, and IQM has set high performance standards with this 20-qubit system. Importantly, it has been demonstrated that even at longer distances, the tunable couplers retain remarkable fidelity, surpassing 99.8%.
Careful Noise Analysis The IQM 20-qubit chip is susceptible to noise, much like any other quantum computing device. Coherence time measurements and randomized benchmarking trials were used to carefully determine the chip’s noise parameters for this study. To guarantee precision, these crucial parameters are measured for every single qubit or qubit pair, and they include:
- Gate timing and fidelity for single-qubit gates. Average single-qubit gate fidelity was 99.85% at 20 ns.
- Gate timing and fidelity for two-qubit gates. At 40 ns, the average two-qubit gate integrity was 98.59%.
- The energy transfer from the qubit to its surroundings is characterized by the relaxation time. 41.8 µs was the averag time.
- Depolarization time, which describes how a qubit’s phase information is lost. 3.2 µs was the average time.
- State 0 and state 1 measurement error probability. For states 0 and 1, the average measurement error probabilities were 2.66% and 5.09%, respectively.
In essence, a “digital twin” of the IQM 20-qubit processor was created by using these specific values as inputs for the new noise model.
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Benchmarking and Superior Prediction Accuracy
Superior Prediction Accuracy and Benchmarking On the IQM 20-qubit chip, a wide range of benchmark circuits of different types (structured and random) and sizes (from 2 to 7 qubits with depths ranging from 5 to 87) were used to validate the model. Among these were circuits using the Quantum Approximate Optimisation Algorithm (QAOA), Random Unitary (RU), and Greenberger-Horne-Zeilinger (GHZ) algorithms. Every circuit was painstakingly assembled to conform to the native gate set and topology of the target hardware, frequently necessitating topology adaption procedures like gate translation and SWAP insertion using the Nnizer plugin in Eviden’s Qaptiva framework.
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The Hellinger distance, a mathematical measure that is especially well-suited for comparing probability distributions from noisy quantum states because it successfully takes into account outcomes with noiseless zero-probability contributions, was employed for quantitative comparison.
The benchmarking results showed that the simulations generated using the new noise model and the real experimental data from the IQM chip agreed very well. The agreement was nearly flawless for smaller circuits, like GHZ-2 to GHZ-5, with Hellinger distances constantly falling below 0.1. The model faithfully captured the behavior of the actual hardware, even for larger circuits such as GHZ-6, GHZ-7, RU, and QAOA. For RU and QAOA circuits, Hellinger distances stayed well below 0.1, even if their depths were greater. The model demonstrated its capacity to assess the quality of the results of very vast and noisy circuits by correctly simulating the hardware outputs for QAOA circuits, which were nearly random sampling because of their considerable depth.
The improved performance of the new method was further demonstrated by a direct comparison with other noise models, particularly the unified noise model (UNM) and the Qiskit composite model (QiskitCM), which were previously investigated on IBM Q Melbourne. In comparison to the competing models, the new model demonstrated a notable improvement for quantum walk circuits tested on IBM Q Melbourne, reducing Hellinger distances by almost 50% for bigger circuits (QW-4, QW-5, and QW-6). The researchers credit this significant increase to their improved modeling of noise on idle qubits.
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Outlook for Quantum Computing
Prospects for Quantum Computing An important development for the field of quantum computing is the successful validation of this precise and versatile noise model on the IQM 20-qubit chip. It enables researchers to efficiently assess and optimize quantum algorithms prior to their implementation on costly and resource-constrained real quantum hardware by offering a more accurate depiction of quantum hardware behavior. Additionally, it provides a strong basis for important applications such as error mitigation.
Although the model exhibits high agreement, the researchers note small differences, which are probably caused by more intricate noise sources such coherence errors, leakage, and crosstalk that have not yet been fully included. These sophisticated error channels will be incorporated into future research in an effort to improve the model even more. Future study should also focus on examining the model’s performance on different quantum computing architectures, such neutral atom or trapped-ion devices. This work is a crucial step in comprehending the constraints of existing hardware and improving algorithms to provide important and dependable results in the noisy quantum era. It is greatly aided by the IQM 20-qubit chip’s extensive characterization and benchmarking capabilities.
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