ZeroRISC and Global Research Leaders Unveil First Production-Grade Open-Source Post-Quantum Cryptography Stack for Silicon
The Boston-based leader in transparent silicon supply chain integrity, ZeroRISC, has announced the full open-source release of its complete cryptographic hardware and software stack in a historic step for the future of device security. This release represents the first delivery of production-ready post-quantum cryptography (PQC) for open-source silicon. It was created through a multi-year hardware-software co-design collaboration with the Max Planck Institute for Security and Privacy and the Institute of Information Science at Academia Sinica.
A fundamental leap in embedded systems’ defense against the impending threat of quantum computing is introduced by the announcement, which coincides with a joint presentation at Real World Crypto 2026. ZeroRISC is giving the industry a foundation for “production-grade” security that is both high-performance and publicly verifiable by combining an open-source silicon platform with a programmable embedded library, Cryptolib.
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A New Era of Hardware-Software Co-Design
The basis of this success resides in a “mutually reinforcing collaboration” between academic rigor and industry execution. While scholars offered profound insights into the theoretical potential of lattice-based cryptography, ZeroRISC engineers honed these ideas for the severe limitations of commercial manufacturing.
A programmable Asymmetric Cryptography Coprocessor (ACC) created especially for post-quantum and conventional asymmetric algorithms is at the core of the hardware release. Dedicated hardware accelerators for symmetric processes like AES and SHA-2/3 complement this.
This partnership has produced important technological outcomes. For the ACC, research partners created new multiplier and adder hardware, more datapath registers, and enhanced vector ISA instructions. When combined with software enhancements, these silicon-level changes resulted in 6–9x speedups for the recently standardized ML-KEM and ML-DSA algorithms. Additionally, the group was able to increase the maximum working frequency by 36–75% while keeping the area cost close to zero, which is crucial for embedded devices that are sensitive to cost.
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Hardening Cryptography for the Real World
ZeroRISC developers had to undergo extensive “hardening” to transform a research item into a production-ready solution. This required major memory optimizations; for example, the team cut the ML-DSA stack consumption by more than 90%, which directly affected the coprocessor’s final memory configuration.
The group also used innovative rejection sampling strategies that eliminated processor stalls in ML-KEM and reduced ML-DSA cycle counts by almost half. A degree of configurability that spans from the Register Transfer Level (RTL) to the software library is required because the entire lattice cryptography capability is designed to be parametrized, enabling silicon integrators to include or exclude PQC hardware extensions based on their specific power and area needs.
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The Power of Cryptolib
The software component of this release, Cryptolib, provides a mature, modular architecture. It supports a wide range of algorithms on the classical side, such as:
- AES (many modes)
- SHA-2/SHA-3 hashing
- RSA key creation and management
- Elliptic Curve Cryptography (Ed25519, X25519, ECDSA, and ECDH)
The three main families of NIST-standardized PQC algorithms, ML-KEM, ML-DSA, and SLH-DSA, have hardware-accelerated implementations in Cryptolib on the post-quantum front. Notably, post-quantum secure boot capabilities have been available since the first day of silicon availability, with the SLH-DSA (previously SPHINCS+) implementation, which has been in production since early chip samples.
The library has a strong testing infrastructure with functional tests, automated Known Answer Test (KAT) testing against Wycheproof and NIST vectors, and sophisticated simulation and debugging tools to guarantee commercial reliability.
The Open-Source Philosophy
“Open-source silicon and cryptography are the future of device security,” stated ZeroRISC CEO and founder Dom Rizzo. This release is evidence of what happens when top cryptographers and silicon engineers “co-design hardware and software together in the open,” according to Rizzo, a pioneer in the subject and the creator of the OpenTitan project. The final stack, he said, is “verifiable and built for the common good” in addition to being quick.
This sentiment was mirrored by Peter Schwabe, Scientific Director at the Max Planck Institute for Security and Privacy, who contended that the open-source model, which revolutionized the software industry, now has to be applied to hardware. According to Schwabe, this partnership shows how research can proceed “responsibly from the lab into production.” “Open-source silicon accelerates research the same way open-source software always has.”
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Context and Market Urgency
The discharge occurs at a crucial point. Industries from cloud computing to critical infrastructure are rushing to get ready for the “quantum transition,” the moment when quantum computers might potentially violate existing encryption standards as the National Institute of Standards and Technology (NIST) finalizes post-quantum standards.
ZeroRISC is in a strong position to spearhead this change. Recently, the firm received a $10 million seed fundraising round sponsored by Fontinalis Partners, and has hired notable industry personalities to its board of directors, including David Gammon, CEO of Rockspring, and Zakir Durumeric, a professor at Stanford. The goal of this funding infusion is to hasten the commercial use of open-source silicon for safe products.
Looking Ahead: Real World Crypto 2026
In a session titled “Migrating a Silicon Root of Trust to Post-Quantum Crypto” at Real World Crypto 2026, the joint academic and business consortium will go into the specifics of their work. The discussion will center on the hardware-software co-design approach and how the group was able to produce high-performance lattice cryptography while adhering to the stringent memory and power limitations common to embedded systems.
The message is obvious for security architects and device manufacturers: the tools for the next generation of security are no longer theoretical. The groundwork for a publicly verifiable post-quantum future has been established with the introduction of Cryptolib and the hardware stack that goes with it.
About ZeroRISC: With its headquarters located in Boston, Massachusetts, ZeroRISC uses secure open-source silicon designs and device identity management to provide verifiable supply chain integrity. Customers can establish unbreakable trust between hardware and software by separating device security from the manufacturing location with the company’s Integrity Management Platform. For additional detail on the technological journey from research to production, ZeroRISC publishes an extensive set of public technical documents on its blog.
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