The Perlmutter supercomputer simulates quantum chips with unprecedented detail.
Perlmutter Supercomputer
The successful use of the Perlmutter supercomputer at the National Energy Research Scientific Computing Centre (NERSC) has greatly advanced the effort to develop reliable and useful quantum hardware. In order to improve the performance of quantum chips, Perlmutter has been employed to do previously unheard-of, extremely detailed simulations of large-scale quantum circuits and quantum microchips.
The ultimate objective of employing these conventional simulations is to offer extensive, high-fidelity analysis that actively speeds up the development, comparison, and refinement of upcoming quantum software and hardware. Even though they are costly, these intensive classical computations are a crucial design and verification tool as quantum hardware advances.
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Modeling the Microchip: An Unprecedented Physical Simulation
In one pioneering simulation, a superconducting quantum microprocessor that was jointly developed by UC Berkeley’s Quantum Nanoelectronics Laboratory and Berkeley Lab’s Advanced Quantum Testbed (AQT) was modelled. The main goal was to simulate the construction and operation of the device at the full-wave physical level. It differs from other simulations that frequently regard the quantum chip as a “black box” due to its unique level of realism that takes into account material, layout, and wiring.
The simulation, which captured the behavior spanning roughly four orders of magnitude in scale, was technically complex. Researchers solved time-domain partial differential equations (PDEs) for whole device electromagnetic (Maxwell) systems. By combining circuit elements with nonlinear behavior, the physics model enabled researchers to observe the chip’s spectrum and transient responses simultaneously. Because it overcomes the drawbacks of many frequency-domain or reduced models, which usually overlook important transient and nonlinear effects, this time-domain method is essential.
The simulated object’s physical size was tiny, a multi-layered chip that was 0.3 mm thick and 10 mm square. The researchers discretized the chip into an incredible 11 billion grid cells, including etchings as tiny as one micron wide, to precisely record the electromagnetic wave propagation.
To manage this detail, a huge computing scale was needed. Over the course of a day, the simulation used almost 7,000 of Perlmutter’s 7,168 NVIDIA GPUs. In under seven hours, the team executed over a million time steps by utilizing the entire size of the system. Researchers were able to test three different circuit designs in a single day this amazing speed.
For quantum engineers, doing device-level, time-domain simulations at this scale yields important performance insights. It makes it possible to record nonlinear interactions and realistic noise coupling. Compared to simplified or exclusively frequency-domain models, this detail greatly improves confidence in forecasting crosstalk and gate fidelity. Researchers can also identify hidden resonances, emergent failure modes, and spectral coupling problems that smaller-scale models might overlook by replicating vast sections of the hardware with such high accuracy.
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Diving Deep into Quantum Circuits and Algorithms
Perlmutter is an essential tool for the QIS@Perlmutter program, which goes beyond device physics and aims to advance quantum circuits and algorithms through simulation on classical hardware. Advanced high-performance quantum simulation software and other methods are being developed and tested by researchers using the platform.
With the help of capabilities like CUDA-Q, NVSHMEM for inter-GPU communication, and specialized use of TensorCores, these software development initiatives give priority to GPU-native optimizations. Examples of developed tools include Q-Gear, which converts Qiskit instructions into CUDA-Q for maximum GPU utilization on Perlmutter, and TANQ-Sim, a density-matrix simulator accelerated by TensorCores. Strong scaling and almost full GPU utilization are guaranteed by these optimization efforts.
Important aspects of quantum development are addressed by the simulated systems. For instance, simulations of the Quantum Approximate Optimization Algorithm (QAOA) showed that, during its evolution, the algorithm frequently passes through a phase with considerable entanglement. Because of this entanglement, some classical algorithms find it especially difficult to replicate QAOA. Time-evolution simulations of the transverse-field Ising model (TFIM), a 2D spin lattice with systems scaled up to 40 qubits, have also been conducted using Perlmutter to investigate Quantum Systems Dynamics. Using a single A100 GPU instead of a multi-threaded CPU resulted in a notable 600x speedup for simulations with 20 to 30 qubits.
One of the new methods created with Perlmutter is Circuit Cutting/Knitting. Using this technique, big quantum circuits are divided into smaller sub-circuits that may be installed on existing small-scale quantum devices. The resultant data is then pieced back together using Perlmutter’s classical computing power. The 40-qubit simulations demonstrated by HPE and NVIDIA, which used 1,024 A100 GPUs and required about 24 minutes, have proven this method. Noise modelling, which simulates the effects of decoherence and noise in quantum systems to help researchers understand how to reduce errors in real-world quantum hardware, is another crucial area of attention.
Advancing Quantum Co-Design and Error Reduction
Quantum chip designers may precisely benchmark their designs by the ability to execute time-domain, device-level simulations with near-device realism. Better predictions for gate error, spectrum problems, and crosstalk are produced by this capacity prior to the expensive fabrication process starting. In the end, these simulations aid in co-design initiatives. To lessen the design’s intrinsic sensitivity to noise and undesired resonances, designers might methodically experiment with layout combinations, device geometry, and control pulse shapes.
The Perlmutter supercomputer is speeding up the cycle of research and optimization required to realize future stable quantum computing systems by providing a platform for thorough, high-fidelity verification and design iteration.
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